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MM74C150 * MM82C19 16-Line to 1-Line Multiplexer 3-STATE * 16-Line to 1-Line Multiplexer
October 1987 Revised January 1999
MM74C150 * MM82C19 16-Line to 1-Line Multiplexer 3-STATE * 16-Line to 1-Line Multiplexer
General Description
The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical "1" state and the output of MM82C19 in the highimpedance state. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Features
s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: 3.0V to 15V 1.0V 0.45 VCC (typ.)
s TTL compatibility: Drive 1 TTL Load
Ordering Code:
Order Number MM74C150N MM82C19N Package Number N24A N24A Package Description 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600" Wide 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600" Wide
Connection Diagram
Pin Assignments for DIP
(c) 1999 Fairchild Semiconductor Corporation
DS005891.prf
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MM74C150 * MM82C19
Truth Table
MM74C150 Inputs D X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A STROBE E0 X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X E1 X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X E2 X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X E3 X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X E4 X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X E5 X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X E6 X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X E7 X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X E8 X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X E9 E10 E11 E12 E13 E14 E15 X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 Output W 1 (Note 1) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Note 1: For MM72C19/MM82C19 this would be Hi-Z, everything else is the same.
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MM74C150 * MM82C19
Logic Diagrams
MM74C150
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MM74C150 * MM82C19
Logic Diagrams
(Continued) MM82C19
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MM74C150 * MM82C19
Absolute Maximum Ratings(Note 2)
Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating VCC Range 700 mW 500 mW 3.0V to 15V -0.3V to VCC+0.3V -40C to +85C -65C to +150C
VCC Lead Temperature (soldering, 10 seconds)
18V 260C
Note 2: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristic table provides conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted. Symbol CMOS to CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) IOZ Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Output Current in High Impedance State MM82C19 ICC VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Output Source Current (P-Channel) Output Source Current (P-Channel) Output Sink Current (N-Channel) Output Sink Current (N-Channel) VCC = 10V, VOUT = VCC, TA = 25C 20 40 mA VCC = 5.0V, VOUT = VCC, TA = 25C 4.35 8 mA VCC = 10V, VOUT = 0V, TA = 25C -20 -40 mA VCC = 15V, VO = 15V VCC = 15V, VO = 0V VCC = 15V 74C, 82C, VCC = 4.75V 74C, 82C, VCC = 4.75V 74C, 82C, VCC = 4.75V, IO = -1.6 mA 74C, 82C, VCC = 4.75V, IO = 1.6 mA VCC = 5.0V, VOUT = 0V, TA = 25C -4.35 -8 2.4 0.4 VCC-1.5 0.8 CMOS/LPTTL Interface V V V V mA -1.0 0.005 -0.005 0.05 300 1.0 A A A VCC = 5.0V VCC = 10V VCC = 5.0V VCC = 10V VCC = 5.0V, IO = -10 A VCC = 10V, IO = -10 A VCC = 5.0V, IO = +10 A VCC = 10V, IO = +10 A VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V -1.0 0.005 -0.005 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V V V V V V A Parameter Conditions Min Typ Max Units
Output Drive (Short Circuit Current)
5
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MM74C150 * MM82C19
AC Electrical Characteristics
TA = 25C, CL = 50 pF, unless otherwise noted
Symbol tpd0, tpd1 Parameter Propagation Delay Time to a Logical "0" or Logical "1" from Data Inputs to Output tpd0, tpd1 Propagation Delay Time to a Logical "0" or Logical "1" from Data Select Inputs to Output tpd0, tpd1 Propagation Delay Time to a Logical "0" or Logical "1" from Strobe to Output MM74C150 t1H, t0H Delay from Strobe to High Impedance State MM82C19 tH1, tH0 Delay from Strobe to Logical "1" Level or to Logical "0" Level (from High Impedance State) MM82C19 CIN COUT CPD Input Capacitance Output Capacitance MM82C19 Power Dissipation Capacitance
(Note 3)
Conditions Min Typ 250 110 290 120 290 120 Max 600 300 650 330 650 330 Units ns ns ns ns ns ns
VCC = 5.0V VCC = 10V VCC = 5.0V, CL = 150 pF VCC = 10V, CL = 150 pF VCC = 5.0V VCC = 10V
VCC = 5.0V VCC = 10V
120 55
300 150
ns ns
VCC = 5.0V, RL = 10k, CL = 5 pF VCC = 10V, RL = 10k, CL = 5 pF VCC = 5.0V, RL = 10k, CL = 5 pF VCC = 10V, RL = 10k, CL = 5 pF
80 60 80 30
200 150 250 120
ns ns ns ns
Any Input (Note 4) (Note 4) (Note 5)
5.0 11.0 100
pF pF pF
Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note AN-90.
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MM74C150 * MM82C19
Switching Time Waveforms
CMOS to CMOS
t1H and tH1
t1H
tH1
t0H and tH0
t0H
tH0
Note: Delays measured with input t r, tf 20 ns.
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MM74C150 * MM82C19 16-Line to 1-Line Multiplexer 3-STATE * 16-Line to 1-Line Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600" Wide Package Number N24A
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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